boot.py iterpreted or precompiled?

[Xykon]

I did the same test on my LoPy and I can see the following:

The rgb led lights up steady blue (which is to signal an error in boot.py).
I can see the first uart.write succeed.
It then throws an error message on the serial REPL:

Traceback (most recent call last):
  File "boot.py", line 31, in <module>
NameError: name 'some_not_existed' is not defined

It might be that in your case the write to the serial port collides with the REPL throwing the error message and that's why you don't see the output.

I'll stand by my earlier comment not to write to the uart directly after you assigned the REPL to it.

[livius]

But print have parameter to which uart to write
or it write only to 0?

[Xykon]

print('test') would write test to the REPL

[livius]

i have changed all uart.write to print
and the behavior is the same
i do not see any output if error occure in some line

[livius]

have someone WiPy2 and can test this?

# boot.py -- run on boot-up
import os
import time
import pycom
from machine import UART
uart = UART(0, 115200)
os.dupterm(uart)
print('start')
some_not_existed() 
print('end')

[Xykon]

@livius Sorry only have a LoPy but this is what I get:

ets Jun  8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
ets Jun  8 2016 00:22:57

rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0x00
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:QIO, clock div:2
load:0x3fff9010,len:8
load:0x3fff9018,len:312
load:0x40078000,len:2348
ho 0 tail 12 room 4
load:0x4009f000,len:1364
entry 0x4009f2f8
rtc v112 Sep 26 2016 22:32:10
XTAL 40M
frc2_timer_task_hdl:3ffda4a8, prio:22, stack:2048
tcpip_task_hdlxxx : 3ffdec74, prio:18,stack:2048
phy_version: 123, Sep 13 2016, 20:01:58, 0
pp_task_hdl : 3ffdfe24, prio:23, stack:8192
mode : softAP(24:0a:xx:xx:xx:xx)
dhcp server start:(ip: 192.168.4.1, mask: 255.255.255.0, gw: 192.168.4.1)
dhcp server start:(ip: 192.168.4.1, mask: 255.255.255.0, gw: 192.168.4.1)
start
Traceback (most recent call last):
  File "boot.py", line 9, in <module>
NameError: name 'some_not_existed' is not defined
MicroPython d78a5a3 on 2016-11-05; LoPy with ESP32
Type "help()" for more information.
>>>

[livius]

Thank you Xykon
i must test this more to find what cuse problems
i will try tommorow with fresh mind ;-)

[livius]

i tested today and for simple sample like above it work now
but for my whole code it not work. Here is my boot.py

# boot.py -- run on boot-up
import os
import time
import pycom
from machine import UART
uart = UART(0, 115200)
os.dupterm(uart)
print('przed dioda proc')
def Dioda(kolor1, kolor2, czas1, czas2):
	for i in range(10):
		pycom.heartbeat(False)
		pycom.rgbled(kolor1) 
		time.sleep_ms(czas1)
		pycom.heartbeat(False)
		pycom.rgbled(kolor2) 
		time.sleep_ms(czas2)
print('przed lpad proc')		
def LPad(s, dl, znak):
	for i in range(len(s), dl):
		s = znak + s
	return s
	
print('przed lpad0 proc')
def LPad0(s, dl):
	for i in range(len(s), dl):
		s = '0' + s
	return s	
print('za proc')
fname='/flash/log_boot.txt'
last_dt=time.ticks_ms()
print('przed dioda')
Dioda(0xff0000, 0x000000, 100, 50)
print('przed open')
jest = len([item for item in os.listdir() if 'log_boot.txt'==item])>0
if jest:
	f_log = open(fname, 'r+')
	jest = not (os.stat(fname)[6]==0)
else:
	f_log = open(fname, 'w')
try:
	Dioda(0x00ff00, 0x000000, 100, 50)
	f_log.seek(0,0)
	if jest>0:
		print('jest wiekszy')
		Dioda(0x0000ff, 0x000000, 100, 50)
		f_log.seek(0,0)
		ile = int(f_log.readln())+1
		f_log.seek(0,0)
		f_log.write(LPad0(str(ile), 10)+''))
		print('jest wiekszy zapis 2')
		#467892
		f_log.seek(20,2) #os.SEEK_SET os.SEEK_END
		last_dt = int(f_log.readln())+time.ticks_ms()
		f_log.write(LPad0(str(last_dt), 20) + '')
		print('jest wiekszy zapis 3')
		Dioda(0xff00ff, 0x000000, 100, 50)
	else:
		print('brak lub pusty')
		Dioda(0x666666, 0x000000, 100, 50)
		f_log.write(LPad0('1', 10) + '')
		last_dt = time.ticks_ms()
		f_log.write(LPad0(str(last_dt), 20) + '')
		print('brak lub koniec')
	f_log.close()
except: 
	f_log.close()
	raise
print('--koniec--')

if you remove all in "if" after line

if jest>0:
		print('jest wiekszy')

but before "else"
then you got outputs on uart
but with whole code you got nothing ont the uart
if you got something especially error in your lopy then i'am very interested

[Xykon]

You could use a boot.py that just contains the code for the serial REPL and copy the rest of the code into a new file 'boot2.py'.

Then after your WiPy has booted you can run execfile('boot2.py'). That should give you the proper error message for your code. Once you have tested your code and have confirmed it is working you can append the command execfile('boot2.py') to your boot.py file to have the code in boot2.py run automatically on boot.

It would also be more convenient as you don't have to reset your board every time you make a small change to your code.

[livius]

good point :)
P.S. did you test that my code?

[Xykon]

@livius said in boot.py iterpreted or precompiled?:

P.S. did you test that my code?

Sorry I'm busy with something else right now.

[livius]

i have fixed errors in my boot.py

but i'm interested about your results on lopy with output by uart
if it is like "interpreted" or like "precompiled" behavior
put here result when you got time to test it :)

PS> do you know if RTC(real time clock) work now in current firmware?

[Xykon]

@livius said in boot.py iterpreted or precompiled?:

but with whole code you got nothing ont the uart

I ran your code on my LoPy and I don't get any output after the two dhcp start lines.

I guess this is a bug in the firmware that PyCom should look at though I'd argue they have bigger things to do right now. :)