Low memory issues. Maybe a milestone in firmware

  • It seems that all the functionality inside one core is limiting the hardware.

    I think that firmware has two options now:

    1. Firmware must be less with less debugging info but firmware is an interpreter and carries all cons.
    2. Firmware must be splitted possibly like:

    a. Core. Pin and timer functionality
    b. Core + I2C.
    c. Core + SPI.
    d. Core + I2C + SPI
    e. Core + RTC + Lora
    f. Core + All

    It is just a suggestion because I do not know the sizes of the above elements.

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